Impossible to program a Kintex-7 with Vivado Lab Edition 2015.[1,2]

Hello,
I'm trying to program a Kintex-7 160T with a Platform USB Cable and Vivado Lab Edition 2015.1 and 2015.2. The JTAG chain is shown on the screenshot below:
It is possible to program very small bitstream (~600KiB). But when the bitstreams become bigger, the configuration fails.
Configuring the same FPGA on the same board with Impact 14.2 is working.
How can I configure the FPGA with Vivado Lab Edition?
Olivier
Advertisement
Reply

For the following tests, I'm using two bitstream files:
logic.bit:
Very basic design which sets pins to some values.The file is compressed and its size is 676,383 bytes
ISE 14.2 has been used to generate it.
logic_vivado.bit:
It's our design.
Its size is 6,692,674 bytes
Vivado 2014.4 has been used to generate it.
I'm using two computers for these tests:
A Windows7 computer with iMPACT 14.2
A Windows8 computer with Vivado Lab Edition 2015.1
The same board and the same Platform USB Cable (DLC9) were used.
For each tool, I'm configuring the "logic.bit" bitstream and then the "logic_vivado.bit" bistream.
Here is the log of iMPACT 14.2:
Welcome to iMPACT
iMPACT Version: 14.2
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
GUI --- Auto connect to cable...
// *** BATCH CMD : setCable -port auto
INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4
INFO:iMPACT - Digilent Plugin: no JTAG device was found.
AutoDetecting cable. Please wait.
PROGRESS_START - Starting Operation.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
Driver file xusbdfwu.sys found.
Driver version: src=1027, dest=1027.
Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
Cable PID = 0008.
Max current requested during enumeration is 280 mA.
Type = 0x0605.
Cable Type = 3, Revision = 0.
Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 1100.
File version of C:/Programs/Xilinx/14.2/ISE_DS/ISE/data/xusbdfwu.hex = 1100.
Firmware hex file version = 1100.
PLD file version = 0012h.
PLD version = 0012h.
PROGRESS_END - End Operation.
Elapsed time = 0 sec.
Type = 0x0605.
ESN not available for this cable.
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: 7/22/2015 5:50:01 PM
// *** BATCH CMD : Identify -inferir
PROGRESS_START - Starting Operation.
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xc7k160t, Version : 0
INFO:iMPACT:1777 -
Reading C:/Programs/Xilinx/14.2/ISE_DS/ISE/kintex7/data/xc7k160t.bsd...
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:501 - '1': Added Device xc7k160t successfully.
'1': : Manufacturer's ID = Xilinx xcf32p, Version : 13
INFO:iMPACT:1777 -
Reading C:/Programs/Xilinx/14.2/ISE_DS/ISE/xcfp/data/xcf32p.bsd...
INFO:iMPACT:501 - '1': Added Device xcf32p successfully.
'2': : Manufacturer's ID = Xilinx xcf32p, Version : 13
INFO:iMPACT:501 - '1': Added Device xcf32p successfully.
'3': : Manufacturer's ID = Xilinx xcf32p, Version : 13
INFO:iMPACT:501 - '1': Added Device xcf32p successfully.
'4': : Manufacturer's ID = Xilinx xc7k70t, Version : 0
INFO:iMPACT:1777 -
Reading C:/Programs/Xilinx/14.2/ISE_DS/ISE/kintex7/data/xc7k70t.bsd...
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:501 - '1': Added Device xc7k70t successfully.
done.
PROGRESS_END - End Operation.
Elapsed time = 1 sec.
// *** BATCH CMD : identifyMPM
// *** BATCH CMD : assignFile -p 5 -file "P:/[...]/logic.bit"
'5': Loading file 'P:/[...]/logic.bit' ...
done.
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
Data width read from the bitstream file = 4.
INFO:iMPACT:501 - '5': Added Device xc7k160t successfully.
INFO:iMPACT - Current time: 7/22/2015 5:50:52 PM
// *** BATCH CMD : Program -p 5
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 15000000.
Validating chain...
Boundary-scan chain validated successfully.
1: Device Temperature: Current Reading: 65.14 C, Min. Reading: 41.02 C, Max. Reading: 65.63 C
1: VCCINT Supply: Current Reading: 0.990 V, Min. Reading: 0.987 V, Max. Reading: 0.993 V
1: VCCAUX Supply: Current Reading: 1.813 V, Min. Reading: 1.790 V, Max. Reading: 1.816 V
5: Device Temperature: Current Reading: 58.74 C, Min. Reading: 56.28 C, Max. Reading: 59.23 C
5: VCCINT Supply: Current Reading: 0.987 V, Min. Reading: 0.987 V, Max. Reading: 0.993 V
5: VCCAUX Supply: Current Reading: 1.811 V, Min. Reading: 1.811 V, Max. Reading: 1.813 V
INFO:iMPACT - Creating XC7K160T device.
PROGRESS_START - Starting Operation.
'5': Programming device...
Match_cycle = NoWait.
Match cycle: NoWait
LCK_cycle = NoWait.
LCK cycle: NoWait
done.
INFO:Cse - Status register values:
INFO:Cse - 0011 1111 1001 1110 0000 1000 0000 0010
INFO:Cse - '5': Completed downloading bit file to device.
INFO:Cse - '5': Programming completed successfully.
PROGRESS_END - End Operation.
Elapsed time = 2 sec.
Match_cycle = NoWait.
Match cycle: NoWait
LCK_cycle = NoWait.
LCK cycle: NoWait
INFO:iMPACT - '5': Checking done pin....done.
'5': Programmed successfully.
// *** BATCH CMD : assignFile -p 5 -file "P:/[...]/logic_vivado.bit"
'5': Loading file 'P:/AS/OCt/dvk310/as1662/logic_vivado.bit' ...
done.
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0XFFFFFFFF.
Data width read from the bitstream file = .
INFO:iMPACT:501 - '5': Added Device xc7k160t successfully.
INFO:iMPACT - Current time: 7/22/2015 5:51:22 PM
// *** BATCH CMD : Program -p 5
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 15000000.
Validating chain...
Boundary-scan chain validated successfully.
1: Device Temperature: Current Reading: 66.13 C, Min. Reading: 41.02 C, Max. Reading: 66.13 C
1: VCCINT Supply: Current Reading: 0.990 V, Min. Reading: 0.987 V, Max. Reading: 0.993 V
1: VCCAUX Supply: Current Reading: 1.813 V, Min. Reading: 1.790 V, Max. Reading: 1.816 V
5: Device Temperature: Current Reading: 58.74 C, Min. Reading: 58.25 C, Max. Reading: 59.23 C
5: VCCINT Supply: Current Reading: 0.990 V, Min. Reading: 0.990 V, Max. Reading: 0.990 V
5: VCCAUX Supply: Current Reading: 1.811 V, Min. Reading: 1.790 V, Max. Reading: 1.813 V
PROGRESS_START - Starting Operation.
'5': Programming device...
Match_cycle = NoWait.
Match cycle: NoWait
LCK_cycle = NoWait.
LCK cycle: NoWait
done.
INFO:Cse - Status register values:
INFO:Cse - 0011 1111 1001 1110 0000 1000 0000 0010
INFO:Cse - '5': Completed downloading bit file to device.
INFO:Cse - '5': Programming completed successfully.
PROGRESS_END - End Operation.
Elapsed time = 15 sec.
Match_cycle = NoWait.
Match cycle: NoWait
LCK_cycle = NoWait.
LCK cycle: NoWait
INFO:iMPACT - '5': Checking done pin....done.
'5': Programmed successfully.
Now, the log of Vivado 2015.1:
start_gui
open_hw
connect_hw_server
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:
****** Xilinx hw_server v2015.1
**** Build date : Apr 27 2015-19:25:29
** Copyright 1986-1999, 2001-2015 Xilinx, Inc. All Rights Reserved.
open_hw_target [lindex [get_hw_targets -of_objects [get_hw_servers localhost]] 0]
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/Port_#0001.Hub_#0005
current_hw_device [lindex [get_hw_devices] 0]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xc7k70t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
current_hw_device [lindex [get_hw_devices] 4]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 4]
INFO: [Labtools 27-1435] Device xc7k160t (JTAG device index = 4) is not programmed (DONE status = 0).
set_property PROBES.FILE {} [lindex [get_hw_devices] 4]
set_property PROGRAM.FILE {P:/[...]/logic.bit} [lindex [get_hw_devices] 4]
program_hw_devices [lindex [get_hw_devices] 4]
INFO: [Labtools 27-3164] End of startup status: HIGH
refresh_hw_device [lindex [get_hw_devices] 4]
INFO: [Labtools 27-1434] Device xc7k160t (JTAG device index = 4) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
set_property PROBES.FILE {} [lindex [get_hw_devices] 4]
set_property PROGRAM.FILE {P:/[...].bit} [lindex [get_hw_devices] 4]
program_hw_devices [lindex [get_hw_devices] 4]
ERROR: [Labtools 27-3165] End of startup status: LOW
program_hw_devices: Time (s): cpu = 00:00:15 ; elapsed = 00:00:15 . Memory (MB): peak = 710.723 ; gain = 0.000
ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors.
With Vivado, the configuration of the second file fails because DONE does not rise.